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SN74HC164DR is a Texas Instruments 8-bit serial-in, parallel-out shift register in SOIC-14, tape and reel — for GPIO expansion where a microcontroller runs out of pins: LED matrices, relay drivers and 7-segment displays. AND-gated serial inputs plus asynchronous clear give full control over data entry; 2V to 6V operation, 24 MHz clock and ±5.2 mA drive suit 5V and 3.3V logic. Selection advice: the DR suffix is SOIC-14 tape and reel for production — for breadboards use the N (PDIP) variant; unlike the 595 family this part has no output latch, so for glitch-free updates where outputs must change simultaneously, prefer the SN74HC595 instead. Cascade multiple 164s for wider outputs. Parameters verified against TI documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74HC245PWR is a Texas Instruments octal bus transceiver with 3-state outputs in TSSOP-20, tape and reel — for bidirectional data-bus interfacing between subsystems: memory buses, backplane drivers and MCU-to-peripheral bridges. DIR pin selects A-to-B or B-to-A direction; OE isolates the buses. 2V to 6V operation, ±6 mA drive handles 15 LSTTL loads, 12 ns typical propagation. Selection advice: the PWR suffix is the ACTIVE TSSOP-20 tape-and-reel orderable — note the DW (SOIC tube) variant is obsolete, so do not specify DW for new designs; for 3.3V-only systems with 5V-tolerant inputs consider the LVC family instead. Parameters verified against TI documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74AHCT541DW is a Texas Instruments octal buffer/driver with 3-state outputs in SOIC-20, tube — for driving bus lines, memory address registers and transmission lines where TTL-compatible inputs meet CMOS outputs. 4.5V to 5.5V operation with TTL input thresholds, 7.7 ns max delay, ±8 mA drive; dual output-enables (both must be low) simplify bus control. Selection advice: the AHCT family bridges 5V TTL logic to CMOS — for pure 3.3V designs the LVC or HC families draw less current; the DW suffix is SOIC-20 tube — for production reels specify DWR. Inputs and outputs sit on opposite package sides to ease PCB routing. Parameters verified against TI documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74HC04DR is a Texas Instruments hex inverter in SOIC-14, tape and reel — the fundamental logic building block for signal inversion, oscillators and clock buffering across every digital board. Six independent inverters, 2V to 6V operation, 8 ns typical delay at 5V; each gate sinks/sources 4 mA. Selection advice: the DR suffix is SOIC-14 tape and reel — for through-hole use the N variant; for unbuffered oscillator applications specify the SN74HCU04 instead (the HC04's buffered outputs can cause issues in crystal circuits). One of the highest-volume logic parts in the industry — always dual-source the package variant your assembly line prefers. Parameters verified against TI documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC244APWR is a Texas Instruments octal bus buffer in 20-pin TSSOP — for driving data buses and level-translating between logic domains: eight high-speed CMOS buffers organized as two 4-bit sections with 3-state outputs, 1.65V to 3.6V VCC operation, inputs accept up to 5.5V for mixed-mode 5V/3.3V systems, 5.9ns max propagation delay at 3.3V. The Ioff circuitry supports live insertion and partial power-down without back-driving the bus. Selection advice: the PWR code is the TSSOP-20 reel variant — for the smallest footprint the RGY (VQFN) is the alternative; the 5.5V-tolerant inputs make it a cost-effective down-translator (5V to 3.3V/1.8V) without a dedicated level-shifter. Against the SN74HC245 on this site, the LVC244A offers higher speed and wider VCC range — choose LVC for 1.65V-3.6V systems, HC for 5V-only legacy. Parameters verified against TI documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC1G125DBVR is a Texas Instruments single bus buffer in SOT-23-5 — for level shifting and signal buffering in space-constrained designs. 1.65–5.5 V supply, 5 V tolerant inputs, 3.7 ns max propagation at 3.3 V, ±24 mA output drive, Ioff partial-power-down support. Selection advice: the DBVR code is SOT-23-5 on reel — the 1G125 is the non-inverting buffer with output enable; for the inverting version order the 1G04. Parameters verified against Texas Instruments documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC2G125DCUR is a Texas Instruments dual bus buffer gate with 3-state outputs in VSSOP-8, on tape and reel — for buffering and isolating signals between logic domains, with inputs that tolerate a higher voltage than the supply rail and partial-power-down protection for mixed-voltage boards. Selection advice: the DCUR code is the VSSOP-8 reel orderable — the 2G125 is the dual non-inverting buffer; for a single gate use the SN74LVC1G125 family. The propagation-delay and drive figures are specified per supply voltage in the parameter table — design from the row at your rail, not from a headline number. Parameters verified against Texas Instruments documentation (SCES204Q). State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74AHC245PWR is a Texas Instruments octal bus transceiver with 3-state outputs — for bidirectional data-bus interfacing: 2V to 5.5V supply, 8 bidirectional channels, direction-control and output-enable pins, 8.5ns maximum propagation delay at 5V (VCC = 5V ± 0.5V, CL = 50pF, over the datasheet recommended operating free-air temperature range — TI SCLS230N Rev N §5.7), TSSOP-20 package, -40C to 125C. The direction pin flips all eight channels at once, so a single control line manages bus turnaround — no per-bit direction logic needed; the 2-5.5V range bridges 3.3V and 5V domains on the same bus. Business impact: for production builds, confirm lead time and MOQ for the exact PWR (TSSOP-20, tape-and-reel) orderable code against current distributor stock at RFQ. Selection advice: the PWR code is TSSOP-20 tape-and-reel — for wider SOIC use DW, for smaller footprint consider TVSOP DGV; for 5V-only TTL-compatible inputs use the AHCT variant instead. Parameters verified against Texas Instruments documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74AHCT1G125DBVR is a Texas Instruments single bus buffer gate with a 3-state output in the SOT-23-5 (DBV) package — for signal buffering and level restoration where one gate is needed exactly where the signal runs. Its TTL-compatible inputs accept logic from the lower-voltage CMOS families while it runs from the TTL supply class rail, bridging mixed-voltage designs without a dedicated translator. Selection advice: the DBVR code is the SOT-23 tape-and-reel orderable — for the smaller SC-70 package use the DCKR code; the AHCT family belongs to the TTL supply class with TTL inputs, so for wide-range CMOS-level operation consider the AHC or LVC single-gate families. Parameters verified against Texas Instruments documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LV8T541-Q1 is a Texas Instruments AEC-Q100 Grade 1 automotive octal buffer/driver with 3-state outputs and single-supply level translation — for automotive GPIO, bus driving and signal redriving where the sending and receiving logic run on different rails. The level translation is the selection point: reduced-threshold inputs plus 5.5 V-tolerant pins let one device translate up (1.2 V to 1.8 V, 1.5 V to 2.5 V, 1.8 V to 3.3 V, 3.3 V to 5.0 V) and down (5.0 V, 3.3 V and 2.5 V to 1.8 V; 5.0 V and 3.3 V to 2.5 V; 5.0 V to 3.3 V) with no second translator IC, across a 1.65 V to 5.5 V supply, at up to 150 Mbps with 5 V or 3.3 V VCC and 13.7 ns propagation delay. Eight non-inverting buffers share two active-low output-enable pins (both must be low for the outputs to be active), it uses the standard function pinout, offers latch-up performance above 250 mA per JESD 17, HBM ESD classification level 2 and CDM level C4B, and operates from -40°C to +125°C. Package options are 20-pin TSSOP, VSSOP and wettable-flank VQFN. Selection advice: choose the LV8T-Q1 when a design mixes voltage domains; if no translation is needed and the rail is 2 V to 5.5 V CMOS, the SN74AHC541-Q1 is the simpler alternative. For automotive assemblies requiring optical solder-joint inspection, specify the wettable-flank VQFN (RKS) ordering code. Parameters verified against Texas Instruments documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74AHC541-Q1 is a Texas Instruments automotive octal buffer/driver with 3-state outputs — for driving bus lines, memory address registers and transmission lines in automotive modules that run on a single 2 V to 5.5 V CMOS rail. The AHC family is the selection point for straightforward buffering: standard CMOS inputs, balanced outputs, over-voltage-tolerant inputs, very-high-speed 5–10 ns class propagation delay, only 40 µA maximum supply current, and ±8 mA output drive, with latch-up performance above 250 mA per JESD 17 and -40°C to +125°C automotive operation. Eight non-inverting buffers share two active-low output-enable pins (both must be low for the outputs to be active), and inputs and outputs sit on opposite sides of the package to ease PCB routing. Package options are 20-pin TSSOP, VSSOP and VQFN. Selection advice: choose the AHC541-Q1 for 2 V to 5.5 V CMOS buffering with no level translation; if the inputs must accept TTL levels, use the SN74AHCT541-Q1 (4.5 V to 5.5 V) instead; if the design mixes voltage domains (e.g. 1.8 V to 3.3 V or 3.3 V to 5 V), use the SN74LV8T541-Q1 translator instead of adding a separate level shifter. Quote the full ordering code — PW is TSSOP-20, DGS is VSSOP-20, RKS is VQFN-20. Parameters verified against Texas Instruments documentation. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LV8T541 is the Texas Instruments octal buffer and line driver with 3-state outputs and integrated single-supply voltage translation, covered by datasheet SLVSJR1 (August 2025). One device bridges logic domains without a separate level shifter: it runs from 1.65 V to 5.5 V, accepts 5.5 V-tolerant inputs regardless of supply, supports up-translation such as 1.2 V to 1.8 V, 1.8 V to 3.3 V and 3.3 V to 5.0 V as well as down-translation, and passes data up to 150 Mbps at 5 V and 3.3 V supplies, with latch-up performance above 250 mA per JESD 78 Class II. For mixed-voltage boards this removes a BOM line and the associated layout and sourcing risk every time an MCU, sensor or legacy 5 V peripheral changes voltage domain. Selection advice: orderables are SN74LV8T541PWR (TSSOP-20), SN74LV8T541DGSR (VSSOP-20) and SN74LV8T541RKSR (VQFN-20), so quote the full code for the footprint needed; this is the industrial device, and automotive builds use the separate SN74LV8T541-Q1 (also listed) rather than substituting across grades. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74AHC1G08DBVR is the tape-and-reel SOT-23-5 ordering code for the Texas Instruments SN74AHC1G08 single 2-input positive-AND gate, listed as ACTIVE in the datasheet package option addendum and on the TI product page. It operates from 2 V to 5.5 V, shows a maximum propagation delay of 7 ns at 5 V, draws a maximum quiescent current of 10 µA and drives ±8 mA at 5 V, with latch-up performance above 250 mA per JESD 17. The selection point is single-gate glue logic in the smallest standard footprint: one AND function for chip-select gating, enable qualification or signal combining on boards where a full quad-gate package would waste area and routing. Selection advice: AHC input thresholds are CMOS-level rather than the TTL levels of the HCT family, so confirm the driving stage reaches the AHC input-high level at your rail before substituting one family for the other. Parameters verified against the TI SN74AHC1G08 datasheet SCLS571 (package option addendum) and the TI product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC1G08DBVR is the tape-and-reel SOT-23-5 ordering code for the Texas Instruments SN74LVC1G08 single 2-input positive-AND gate, listed as Active Production in the datasheet package option addendum. Its verified figures: operation from 1.65 V to 5.5 V, maximum propagation delay of 3.6 ns at 3.3 V, maximum quiescent current of 10 µA, output drive of ±24 mA at 3.3 V, inputs that accept voltages up to 5.5 V, and Ioff support for partial-power-down operation, over −40 °C to +125 °C. The selection point is single-gate glue logic that keeps working as rails fall: one AND function for chip-select gating or enable qualification that spans 1.8 V, 2.5 V, 3.3 V and 5 V logic in the same footprint. Selection advice: the SN74AHC1G08DBVR also listed in this catalog is the AHC-family counterpart on a 2 V to 5.5 V range with differently centred thresholds — choose LVC when the rail can drop below 2 V or when 5.5 V-tolerant inputs are the point, and confirm the input-high level of the driving stage either way. Parameters verified against the TI SN74LVC1G08 datasheet SCES217 (package option addendum) and the TI product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC1T45DBVR is the tape-and-reel SOT-23-6 ordering code for the Texas Instruments SN74LVC1T45 single-bit dual-supply bus transceiver, listed as Active in the datasheet package option addendum. Its verified figures: two supply rails, VCCA and VCCB, each from 1.65 V to 5.5 V in any relation to the other, data rates up to 420 Mbps, propagation delay of 3.9 ns, maximum supply current of 4 µA and output drive of ±24 mA at 3.3 V, over −40 °C to +85 °C, with a direction-control pin setting the transfer direction. The selection point is one-bit level translation with direction control in six pins: the standard fix for a single control or data line crossing between 1.8 V, 2.5 V, 3.3 V and 5 V domains without a bus-wide translator package. Selection advice: this is a directed transceiver, not an auto-sensing one — if your line must change direction without a control signal (an open-drain bus, for example), choose an auto-direction family instead; if the direction is known, the 1T45 is the smaller and faster answer. Parameters verified against the TI SN74LVC1T45 datasheet (package option addendum) and the TI product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74HC14DR is the tape-and-reel SOIC-14 ordering code for the Texas Instruments SN74HC14 hex Schmitt-trigger inverter, listed as ACTIVE on the TI buy page for this code. Status is per ordering code in this family: the tube form SN74HC14D is obsolete, and that status does not carry to this reel code. Verified thresholds, read on the TI electrical table at a 4.5 V supply: positive-going threshold of 1.55 V minimum, 2.5 V typical and 3.13 V maximum; negative-going threshold of 0.9 V minimum, 1.6 V typical and 2.45 V maximum; hysteresis of 0.4 V minimum, 0.9 V typical and 2.1 V maximum; quiescent supply current of 2 µA maximum at 25 °C and 20 µA maximum over the full range (at a 6 V supply, no load, inputs held at a rail), on a 2 V to 6 V supply, over −40 °C to +85 °C. The selection point is the hysteresis itself: six inverters that turn slow, noisy edges — RC time constants, sensor outputs, switch contacts — into clean logic transitions without a comparator build-up. Selection advice: thresholds scale with the supply, so a design qualified at 5 V must be re-checked at the rail you actually run; and the Nexperia 74HC14D,653 also listed in this catalog is a different maker’s code with its own threshold table — do not mix the two in one qualification. Parameters verified against the TI SN74HC14 datasheet SCLS085L (electrical characteristics table) and the TI product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LV1T34DBVR is the tape-and-reel SOT-23-5 ordering code for the Texas Instruments SN74LV1T34 single buffer with voltage-level translation, listed as Active in the datasheet package option addendum. Its verified figures: one supply from 1.65 V to 5.5 V, data rates up to 150 Mbps, maximum supply current of 5.5 µA, output drive of 8 mA at 5 V (7 mA at 3.3 V) and 5 V-tolerant inputs, over −40 °C to +125 °C. The selection point is translation without a second rail: the input thresholds sit at TTL levels, so a logic signal can cross between voltage domains through a single five-pin buffer — the standard one-gate fix at a domain boundary. Selection advice: this is a unidirectional buffer, not a transceiver — for a line that must pass data both ways under direction control, use a dual-supply transceiver such as the SN74LVC1T45DBVR also listed in this catalog, and budget the extra pin accordingly. Parameters verified against the TI SN74LV1T34 datasheet (package option addendum) and the TI product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC4245APWR is the tape-and-reel TSSOP-24 ordering code for the Texas Instruments SN74LVC4245A dual-supply octal bus transceiver, listed as ACTIVE on the TI part-details page for this code. Its verified figures: a 5 V-side supply (VCCA) of 4.5 V to 5.5 V and a low-voltage side (VCCB) of 2.7 V to 3.6 V, maximum data rate of 200 Mbps, propagation delay of 6.7 ns and maximum supply current of 0.13 mA, over −40 °C to +85 °C. The selection point is byte-wide 5 V to 3.3 V translation with three-state outputs and a direction pin: the bridge for a legacy 5 V bus meeting a 3.3 V processor, without eight single-gate translators or a level-shifting redesign of the backplane. Selection advice: the two rails are not interchangeable — the A side is specified only at 5 V-class voltages, so a design needing 3.3 V to 2.5 V translation belongs to a different member of the LVC translator family; confirm both rail voltages against the code before layout. Parameters verified against the TI SN74LVC4245A product page (part-details for this code). State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC2G04DBVR is the tape-and-reel SOT-23-6 ordering code for the Texas Instruments SN74LVC2G04 dual inverter, listed as Active Production in the datasheet package option addendum. Its verified figures: operation from 1.65 V to 5.5 V, maximum propagation delay of 4.1 ns at 3.3 V, maximum quiescent current of 10 µA and output drive of ±24 mA at 3.3 V, over −40 °C to +125 °C. The selection point is two independent inverters in six pins for the odd inversion jobs of a mixed-voltage board — clock polarity, chip-select sense, reset polarity — that keep working as the rail moves between 1.8 V, 2.5 V, 3.3 V and 5 V logic. Selection advice: these are plain inverters without Schmitt-trigger inputs; for a slow or noisy edge use a Schmitt code such as the SN74HC14DR also listed in this catalog instead of expecting the 2G04 to clean the signal up. Parameters verified against the TI SN74LVC2G04 datasheet SCES195 (package option addendum) and the TI product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC1G14DBVR is the tape-and-reel SOT-23-5 ordering code for the Texas Instruments SN74LVC1G14 single Schmitt-trigger inverter, listed as ACTIVE. Verified figures: operation from 1.65 V to 5.5 V, maximum quiescent current of 10 µA, maximum propagation delay of 4.6 ns at 3.3 V and output drive of ±24 mA at 3.3 V. The selection point is the Schmitt input in a five-pin single gate: it squares up the slow, noisy edges from RC resets, mechanical switches and long sensor lines that a plain inverter would pass through as runt pulses, while the LVC supply range lets the same code serve 1.8 V through 5 V logic. Selection advice: for a plain polarity flip on a clean signal, a non-Schmitt sibling switches faster; choose this G14 code specifically where the input edge cannot be guaranteed. Parameters verified against the TI SN74LVC1G14 datasheet and product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC245APWR is the tape-and-reel TSSOP-20 ordering code for the Texas Instruments SN74LVC245A octal bus transceiver, listed as ACTIVE. Verified figures: operation from 1.65 V to 3.6 V, a maximum propagation delay of 6.3 ns at 3.3 V, output drive of 24 mA and three-state outputs governed by a direction pin and an output-enable pin, across eight channels. The selection point is byte-wide buffering between a processor bus and slower or heavier-loaded peripherals in the 1.8 V to 3.3 V world: one package moves a whole data byte with controlled drive instead of eight discrete gates. Selection advice: one supply does not rule out translation — the maker’s own feature list for this device (§9.3 of the datasheet) allows down voltage translation, 5 V to 3.3 V and 5 V or 3.3 V to 1.8 V, through inputs that accept levels up to 5.5 V, so it covers the step-down direction on a single rail. It is not a general-purpose dual-supply translator: both ports share one VCC and cannot be powered from independent rails. For other voltage-domain combinations, check the driving device’s guaranteed VOH/VOL against this device’s VIH/VIL, and verify output levels under the required load against the receiver’s thresholds; do not assume arbitrary up- or down-translation compatibility. Use a suitable dual-supply translator when independent port rails are required. Parameters verified against the TI SN74LVC245A datasheet and product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

SN74LVC8T245PWR is the tape-and-reel TSSOP-24 ordering code for the Texas Instruments SN74LVC8T245, an 8-bit dual-supply bus transceiver with configurable voltage translation, listed as ACTIVE. Each port runs from its own supply — VCCA and VCCB each accept 1.65 V to 5.5 V — so one package bridges a 1.8 V processor bus to a 3.3 V or 5 V peripheral bank without a separate level-shifter stage. Verified figures: a supply current of 8 µA maximum per side and input current held to ±2 µA maximum, across −40 °C to +85 °C. The selection point is byte-wide translation with direction and output-enable control in a single reel-ready logic code. Selection advice: this is the dual-supply translator. The single-supply SN74LVC245A also supports the maker-listed down-translation cases, but its ports share one VCC rather than independent supply rails. Other voltage-domain combinations require input-threshold and loaded-output checks; it is not a general-purpose substitute for this dual-supply translator — so confirm both rails against the 8T245 code before substituting either way. Parameters verified against the TI SN74LVC8T245 datasheet and product page. State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

CD4050BPWR is a Texas Instruments CD4000-series hex non-inverting buffer and logic-level converter in a TSSOP-16 package, tape and reel, operating from 3 to 18 V with 8 pF typical input capacitance, able to convert TTL levels to CMOS with two supplies. Selection advice: the packing suffix decides availability - the tube form CD4050BPW is obsolete in TI's ordering table while this PWR tape-and-reel code is Active in Production, so quote the full code including the R; in new designs it remains the simple way to level-shift slow control signals into high-voltage CMOS logic. Parameters verified against TI documentation (SCHS046). State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.

CD74HC4051PWR is a Texas Instruments high-speed CMOS 8-channel analog multiplexer/demultiplexer in a TSSOP-16 package, tape and reel, with 70 ohm typical on-resistance at 4.5 V, 180 MHz typical bandwidth (-3 dB, 15 pF load), a digital control range of 2 to 6 V and an analog signal range to 10 V, with break-before-make switching at 6 ns and 9 ns transition times. Selection advice: again the suffix matters - TI's ordering table marks the CD74HC4051PWRG4 and PWT forms obsolete while this PWR code is Active in Production, so order the code exactly as written. Parameters verified against TI documentation (SCLS151). State quantity, packing and date-code requirements in your RFQ; we reconfirm the offered lot before quotation and reply within 24 hours.