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MANUFACTURER PART RECORD

CH343K

CH343K is a WCH USB-to-high-speed-UART bridge in the ESSOP-10 package with an exposed ground pad — for adding a full-speed USB serial port to instruments, control boards and service interfaces, with hardware full-duplex transfer, an integrated clock (no external crystal) and a serial I/O rail that accepts the logic levels of the target system. Selection advice: the K variant exposes a reduced modem-line set in the small package — the full MODEM set is the CH343G (SOP-16) and the variant with integrated EEPROM is the CH343P (QFN-16), so match the letter to the board. The internal clock accuracy feeds the baud-rate error and is printed with its temperature conditions in the parameter table; the current data sheet (CH343DS1, version 2.0) does not state a packing form for this code, so Parameters verified against WCH documentation (CH343DS1).

Interface ICsUSB to UART bridgeESSOP-10

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MPN: CH343K
Manufacturer: WCH
Family: USB to UART bridge
Package: ESSOP-10
Manufacturer channel coverage: Checked by RFQ
Data last checked: Commercial check required
Required order checks: Suffix, package, date code, lot, source and traceability

PROCUREMENT DATA

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MANUFACTURER DATA REVIEW

Key technical specifications

Ordering-code highlights reviewed against official manufacturer documentation.

Function: USB to high-speed UART bridge with hardware full-duplex transfer and independent TX/RX buffers · ESSOP-10 with exposed pad (pin 0, GND)
Baud rate: 50 bps to 6 Mbps (§2, §5.3)
USB interface: Full-speed USB device interface, USB 2.0 compatible; integrated 12 MHz clock (no external crystal) and power-on reset (§2)
Supply arrangements: VDD5 4.0 V minimum / 5 V typical / 5.5 V maximum with the internal regulator mode (V3 to capacitor); or 3.0 V / 3.3 V / 3.6 V with V3 tied to VDD5 (§6.2)
Serial I/O supply: VIO 1.7 V to 5.5 V operating span as printed (serial port and other I/O supply) (§6.2)
Operating and suspend current: IVDD 3 mA typical / 15 mA maximum; suspend current 0.09 mA typical / 0.16 mA maximum at VDD5 = 5 V (§6.2)
Logic thresholds: At VIO = 5 V: VIL 0 V to 1.5 V, VIH 2.5 V to VIO; at VIO = 3.3 V: VIL 0 V to 0.9 V, VIH 1.9 V to VIO; at VIO = 1.8 V: VIL 0 V to 0.5 V, VIH 1.3 V to VIO (§6.2)
Reset thresholds: V3 reset threshold 2.5 V minimum / 2.7 V typical / 2.9 V maximum; VIO threshold 0.8 / 1.0 / 1.15 V (§6.2)
Internal clock accuracy: ±1.0 % over −15 °C to 60 °C; ±1.6 % over −40 °C to 85 °C — the clock error feeds directly into baud-rate error (§6.3)
K-variant pin set: TXD, RXD, RTS and a multiplexed CTS/DTR line; no separate VBUS, DSR, RI or DCD pins (§4, 343K column) — the full MODEM set is the SOP-16 sibling CH343G
Absolute maximum ratings: VDD5 and VIO −0.5 V to 6.0 V; VBUS-sense pin −0.5 V to 6.5 V; UART and other pins −0.5 V to VIO + 0.5 V; operating ambient −40 °C to 85 °C; storage −55 °C to 125 °C (§6.1)
Order-code package: ESSOP-10, body 3.9 mm (150 mil), 1.00 mm pitch; the exposed pad is pin 0 (GND), an optional but recommended connection (§3)
Manufacturer packing: Not specified in CH343DS1 V2.0 (the data sheet lists packages and order models without a packing form or standard quantity)

Source: WCH CH343 Data Sheet CH343DS1, Datasheet Version 2.0 · §2 Features, §3 Packages and Order Models, §4 Pinouts (343K column), §6.1 Absolute Maximum Ratings, §6.2 Electrical Parameters (TA = 25 °C, VDD5 = 5 V or VDD5 = V3 = 3.3 V, VIO = 1.8 V to 5 V, USB pins excluded) · Reviewed 2026-10-30

Sourcing note

Confirm interface standard, isolation requirement, package and board-level compatibility.

Before you request a quote

Confirm packing at quotation
The WCH data sheet does not print a packing form or standard quantity for CH343K. State the required quantity and carrier expectation in the RFQ so the offered lot can be matched explicitly.
Check the modem-line requirement
The K variant exposes a reduced pin set (no DSR, RI or DCD). Designs needing the full MODEM set belong on the CH343G (SOP-16); the EEPROM variant is the CH343P (QFN-16). Match the letter to the board.

Official documentation

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COMMON QUESTIONS

CH343K FAQ

What are the key specifications of CH343K?

From the verified technical profile: Function: USB to high-speed UART bridge with hardware full-duplex transfer and independent TX/RX buffers · ESSOP-10 with exposed pad (pin 0, GND); Baud rate: 50 bps to 6 Mbps (§2, §5.3); USB interface: Full-speed USB device interface, USB 2.0 compatible; integrated 12 MHz clock (no external crystal) and power-on reset (§2). These are the catalog-recorded values for CH343K — always re-check them against the manufacturer datasheet revision quoted on your BOM before finalizing the design.