GD32F103CBT6

GD32F103CBT6 is the LQFP-48 ordering code for the GigaDevice GD32F103 microcontroller. Its memory step is fixed by the maker’s own device table (Table 2-1 of the GD32F103xx datasheet, Rev. 2.15): the CB step carries 128 KB of Flash and 20 KB of SRAM with 37 GPIOs, on an Arm Cortex-M3 core at 108 MHz. Those two memory figures are the identity of this code - a larger SRAM figure quoted for the similarly named GD32VF103 belongs to a different, RISC-V-based device and does not apply here. GigaDevice publishes no per-code lifecycle grading in the captured material; the family stands in the maker’s current documentation, and the status is stated in those neutral terms. The selection point is the mainstream 128 KB step of the GD32F103 line for cost-sensitive control boards that need the family’s peripheral set in the compact 48-pin package. Selection advice: the Flash and SRAM steps share this package across the family, so match the full CB code to your BOM - a same-footprint sibling with a different memory letter is not a drop-in for a firmware image built to this memory map. Parameters verified against the GigaDevice GD32F103xx datasheet Rev. 2.15 (device characteristic table).