SY75712TWL-TR

SY75712TWL-TR is a Microchip Technology 1:2 LVCMOS clock buffer in an 8-pin TDFN package, for fanning one clock out to two 1.2 V to 1.8 V LVCMOS loads on FPGA, SoC, CPU and AI-accelerator boards. It belongs to the SY757xx family of low-voltage LVCMOS buffers that replace discrete voltage-divider translation between higher-voltage clock domains and 1.2 V cores, with family additive jitter as low as 26 fs and a wide 0 Hz to 250 MHz frequency range. A single-chip buffer keeps both output edges aligned and preserves duty cycle, where resistor dividers would eat design margin and distort the clock. Selection advice: choose this part when exactly two low-voltage LVCMOS loads need the same clock; for four loads, the SY75714TWL-TR is the four-output member of the same production trio, and for a differential source, the SY75707TWL-TR is the differential-input member. Confirm input type, termination, output-enable behavior and supply rails against the datasheet before layout, and match the full SY75712TWL-TR orderable code including the TWL-TR tape-and-reel suffix. Parameters verified against Microchip Technology documentation.