EPM1270T144C5N

EPM1270T144C5N is a MAX II CPLD from Intel FPGA (Altera) in a 144-pin TQFP package (20 x 20 mm), supplied in trays — for glue logic, bus bridging and board control that needs instant-on behaviour without an FPGA toolchain budget. The device carries 1,270 logic elements, 980 macrocells in 127 LABs, 8 Kbits of user flash memory and 116 user I/O, with a maximum pin-to-pin delay of 6.2 ns and JTAG in-system programming. Its MultiVolt core runs from an external 2.5 V or 3.3 V supply; the 1.8 V core figures of the G-suffix variants do not apply to this code. Selection advice: the code decodes as T144 for TQFP-144, C for the commercial grade (0 °C to +85 °C junction), speed grade 5 and N for lead-free — the leaded C3 sibling is obsolete, so quote the full C5N code. Authorized distribution lists this code as Active; before committing a long-running legacy build, confirm your Quartus flow still targets the MAX II family. Parameters verified against Intel FPGA documentation.