74HC573PW,118

74HC573PW,118 is the tape-and-reel TSSOP-20 ordering code for the Nexperia 74HC573 octal D-type transparent latch, whose current datasheet (Rev. 9, 2024-08-05) lists the 74HC573PW type together with the ,118 packing code. Eight latches with three-state outputs capture a data byte under a latch-enable pin; off-state output leakage is ±0.5 µA maximum and quiescent current is 8 µA maximum - both 25 °C values at a 6 V supply, but not under one shared test setup: the Rev. 9 table gives the leakage for the output disabled (OFF state) and held at VCC or GND with the inputs at VIH or VIL, and the quiescent current for inputs tied to VCC or GND with zero output current, with wider limits over temperature - and input thresholds follow the HC pattern of 1.5 V minimum high level at a 2 V supply, 3.15 V at 4.5 V and 4.2 V at 6 V. The selection point is byte capture with a flow-through pinout - inputs and outputs on opposite sides of the package keep byte-wide routing straight on dense boards, and address demultiplexing from a multiplexed microcontroller bus is the classic application. Selection advice: the PW,118 code is the TSSOP-20 body on a 13-inch reel - match the body against the SO-20 D code when comparing quotes, since the function is the same but the land pattern is not. Parameters verified against the Nexperia 74HC573 datasheet Rev. 9 (ordering information and Table 6 static characteristics).