R9A08G045SE6GBG#AC0

The R9A08G045SE6GBG#AC0 is the quad-core RZ/G3SE microprocessor, pairing four Arm Cortex-A55 cores at 1.2 GHz with a 200 MHz Cortex-M33 in the platform's 368-ball LFBGA (17 mm x 17 mm, 0.65 mm pitch), pin-compatible with the RZ/G3L family. It keeps the G3SE security stack — Secure IP, secure boot, secure update and secure debug, a true random number generator, Arm TrustZone and tamper detection — and drops the GPU and video codec of the HMI-oriented G3L line, trading graphics for a larger trusted compute budget. That suits secure gateways and EV charging controllers that aggregate several interfaces at once: two TSN-capable Gigabit Ethernet ports, PCIe Gen2 x1, two USB 2.0 ports and three CAN FD channels, backed by 512 KB of ECC system RAM and a 16-bit DDR4/LPDDR4-2133 controller with ECC. Deep standby is about 1 mW with fast Linux wake-up, and junction operation spans -40 °C to +125 °C. Selection note: take the SE6 when a secure design must also juggle multiple concurrent network roles; the dual-core SE5 covers simpler secure nodes on the same footprint and software base. Parameters verified against Renesas Electronics documentation.