GD5F1GQ5UEYIGR

GD5F1GQ5UEYIGR is the tape-and-reel code for a GigaDevice 1 Gbit SLC SPI NAND Flash from the GD5F Q5 series, in a WSON-8 (6x8 mm) package — for firmware and data storage in routers, set-top boxes and IPC cameras where SPI NOR cost per bit stops making sense at this density. It runs from 2.7 V to 3.6 V (the U code), transfers over standard, dual and quad SPI at up to 133 MHz in 2 KB pages, and integrates on-die ECC so the host gets NAND economics without designing its own error correction; the SLC cells are rated for 100K program/erase cycles and 10-year retention. The code appeared in an ic.net.cn buy request on scan day, evidence of current sourcing interest in the Q5 series. Selection advice: the Q5 letters mark a different GigaDevice series from the GD5F1GM7UEYIGR also listed here — both are 1 Gbit SPI NAND in WSON-8, but their feature sets and ECC arrangements differ, so qualify this code against the Q5 datasheet rather than assuming M7 documentation carries over; the host must still run bad-block management. Parameters verified against GigaDevice documentation.