LCMXO3LF-1300C-5BG256C

The LCMXO3LF-1300C-5BG256C is the entry-density MachXO3 control PLD from Lattice, pairing 1,300 LUTs with the family's full 206 user I/O in a 256-ball caBGA (14 x 14 mm, 0.8 mm pitch) - a combination aimed at board management, power sequencing, I/O expansion and glue logic where I/O count matters more than logic depth. It includes 10 kb of distributed RAM, 64 kb of embedded block RAM, 64 kb of user flash (the LF flash-based variant) and one PLL, and the flash configuration is live at power-up with no external boot device. The C device regulates its core from a 3.3 V or 2.5 V rail, and this ordering code is the -5 speed grade in the commercial temperature version. Selection advice: within the same BG256 footprint the family scales to higher LUT counts with pin-compatible migration, so starting at the 1300 density is safe if your I/O map is fixed - but if early synthesis already exceeds roughly two-thirds of the LUTs, step up one density now rather than re-qualifying later. Parameters verified against Lattice Semiconductor documentation.