TL074IDR

TL074IDR is the tape-and-reel SOIC-14 ordering code for the Texas Instruments TL074 quad JFET-input operational amplifier, listed by TI as Active. Each channel pairs a JFET input stage - input bias current of 65 pA typical and 200 pA maximum - with low offset voltage of 3 mV typical and 6 mV maximum, so high-impedance sensor signals are buffered without the loading errors a bipolar input would add. Common-mode rejection is 100 dB typical (75 dB minimum), power-supply rejection is 100 dB typical (80 dB minimum), slew rate is 20 V/µs typical (8 V/µs minimum) per the Rev. W datasheet tables, and quiescent current is 1.4 mA typical per channel. The selection point is precision plus speed in a commodity quad package: four channels of JFET-input amplification for active filters, integrators and signal-conditioning front ends in one SOIC-14, which cuts board area against four single amplifiers. Selection advice: use the R code for reeled SMT supply and design with real headroom - this is not a rail-to-rail family, so check output swing against your supply rails before committing; designs that need two channels rather than four can use the TL072 dual in the same technology. Parameters verified against the TI datasheet SLOS080 Rev. W (TL074 ordering appendix and electrical tables at VS = ±15 V, TA = 25 °C).